ADIADRF68072.8-4.2GHz large dynamic range IQ demodulation scheme

ADI’s ADRF6807 is a large dynamic range IQ demodulator with integrated PLL and VCO operating at 2.8-4.2GHz, LO frequency range from 700MHz to 1050MHz, IP3 up to 26.7dBm, noise (DSB) of 13.1dB, and voltage conversion gain 1.0dB/4.3dB. Phase quadrature demodulation accuracy is better than 0.5 degrees, amplitude quadrature demodulation accuracy is better than 0.1dB, baseband demodulation 170MHz/135MHz, 3dB bandwidth, SPI serial port is used for PLL programming, mainly used in QAM/QPSK RF/IF Demodulators, Cellular CDMA” title=”W-CDMA”>W-CDMA/CDMA/CDMA2000, Microwave Point-to-Point (Multipoint) Radio, Broadband Wireless and WiMAX. This article describes the ADRF6807 key features, block diagram, basic Connection Circuit, Evaluation Board Circuit Diagram and Bill of Materials (BOM), Evaluation Board Component Layout Diagram, and Evaluation Board General Characteristics, Noise Characteristics and Phase Noise Characteristics Test Charts.

The ADRF6807 is a high dynamic range IQ demodulator with integrated phase-locked loop (PLL) and voltage controlled oscillator (VCO). The fractional-N PLL/synthesizer generates a frequency in the range of 2.8 GHz to 4.2 GHz. A programmable quadrature divider (divide ratio = 4) divides the output frequency of the VCO down to the required local oscillator (LO) frequency to drive the mixers in quadrature. Additionally, an output divider (divide ratio = 4 to 8) generates a divided-down VCO signal for external use. The PLL reference input is supported from 9 MHz to 160 MHz. The phase detector output controls a charge pump whose output is integrated in an off-chip loop filter. The loop filter output is then applied to an integrated VCO. The IQ demodulator mixes the differential RF input with the complex LO derived from the quadrature divider. The differential I and Q output paths have excellent quadrature accuracy and can handle baseband signaling or complex IF up to 120 MHz. A reduced power mode of operation is also provided by programming the serial interface registers to reduce current consumption, with slightly degraded input linearity and output current drive. The ADRF6807 is fabricated using an advanced silicon-germanium BiCMOS process. It is available in a 40-lead, exposed paddle, RoHS-compliant, 6 mm × 6 mm LFCSP package. Performance is specified over the −40℃ to +85℃ temperature range.

ADRF6807 main features:

IQ demodulator with integrated fractional-N PLL

LO frequency range: 700 MHz to 1050 MHz

For the following specifications (LPEN = 0)/(LPEN = 1):

Input P1dB: 12.8 dBm/11.7 dBm Input

IP3: 26.7 dBm/24.0 dBm

Noise figure (DSB): 13.1 dB/12.4 dB

Voltage conversion gain: 1.0 dB/4.3 dB

Quadrature demodulation accuracy

Phase accuracy: <0.5°

Amplitude accuracy: <0.1 dB

Baseband demodulation: 170 MHz/135 MHz, 3 dB bandwidth

SPI serial interface for PLL programming

40-lead, 6 mm × 6 mm LFCSP

ADRF6807 application:

QAM/QPSK RF/IF demodulators

Cellular W-CDMA/CDMA/CDMA2000

Microwave point-to-(multi)point radios

Broadband wireless and WiMAX
ADIADRF68072.8-4.2GHz large dynamic range IQ demodulation scheme
Figure 1. ADRF6807 block diagram
ADIADRF68072.8-4.2GHz large dynamic range IQ demodulation scheme
Figure 2. ADRF6807 Basic Connection Diagram
ADIADRF68072.8-4.2GHz large dynamic range IQ demodulation scheme
Figure 3. ADRF6807 Evaluation Board Circuit Diagram
ADRF6807 Evaluation Board Bill of Materials (BOM):
ADIADRF68072.8-4.2GHz large dynamic range IQ demodulation scheme
ADIADRF68072.8-4.2GHz large dynamic range IQ demodulation scheme
ADIADRF68072.8-4.2GHz large dynamic range IQ demodulation scheme
Figure 4. ADRF6807 Evaluation Board Component Layout (Top Layer)
ADIADRF68072.8-4.2GHz large dynamic range IQ demodulation scheme
Figure 5. ADRF6807 Evaluation Board Component Layout (Bottom Layer)
ADIADRF68072.8-4.2GHz large dynamic range IQ demodulation scheme
Figure 6. ADRF6807 Evaluation Board General Characteristics Test Diagram
ADIADRF68072.8-4.2GHz large dynamic range IQ demodulation scheme
Figure 7. ADRF6807 Evaluation Board Noise Characteristics Test Plot

Figure 8. ADRF6807 Evaluation Board Phase Noise Characteristic Test Plot
For details, see:
http://www.analog.com/static/imported-files/data_sheets/ADRF6807.pdf

The Links:   LM64P701 LQ94D021